Hyderabad · On-site

Trainee Engineer - Analog Design

Full-timePosted 3 Nov

Salary: Not disclosed
Experience: 0–1 years
Eligible batches: 2024 · 2025 · 2026
Degree: B.E, M.E
Location: HyderabadOn-site
Apply by: 2 May 2027

About the role

Join Infineon's analog design team in Hyderabad and work through the full chip design flow, from architecture and simulation to layout verification and documentation. You will develop expertise in pre‑ and post‑layout analysis, Monte Carlo studies, corner and noise validation for next‑generation semiconductor devices.

Responsibilities

Design analog blocks such as amplifiers, comparators, band‑gap references, LDOs, DACs and oscillators.
Run pre‑layout and post‑layout simulations using Cadence Virtuoso/Spectre or equivalent tools.
Perform Monte Carlo, corner and noise analyses to ensure circuit robustness.
Document design methodologies, simulation outcomes and verification reports.

Eligibility

B.E or M.E degree in Electronics & Communication, Electrical Engineering, Microelectronics or VLSI Design.

Skills

Strong grasp of MOSFET operation, small‑signal modelling, biasing and feedback concepts.
Familiarity with IC fabrication techniques.
Knowledge of ADC, switched‑capacitor circuits and PLLs is a plus.