Formal Verification Engineer

NVIDIA is hiring a Formal Verification Engineer for New College Graduates from the 2025 and 2026 batches.

About the role

This is a fantastic opportunity for freshers to launch their careers in chip design and hardware verification with one of the world’s most influential technology companies.

Responsibilities

• Learn Formal Methodologies: Pick up best-in-class formal verification techniques and apply them to complex digital designs and SoCs.
• Develop Test Plans: Take ownership of verifying a design by building a robust, well-structured verification test plan.
• Execute Verification: Run the test plan in close collaboration with the design team to confirm functional correctness.
• Use Abstraction Techniques: Apply abstraction methods to make verification of large designs efficient and effective.
• Work with HDLs: Read and understand RTL written in Verilog and System Verilog quickly and accurately.
• Apply Temporal Logic: Write and reason about temporal logic assertions to capture design intent.
• Coordinate for Closure: Work with other verification team members to track, debug, and close all identified issues.

Eligibility

• Educational Qualification: B.Tech or M.Tech in Electrical Engineering, Computer Science, or a closely related field.
• Batch Year: 2025 and 2026 graduates (New College Graduate hiring).
• Academic Performance: A consistent academic record is preferred; NVIDIA looks for strong fundamentals over a fixed cut-off.
• Technical Skills: Hands-on experience with HDLs such as Verilog and System Verilog, understanding of RTL, and knowledge of temporal logic assertions.
• Communication Skills: Strong analytical ability and clear communication to work effectively with design teams.

Skills

• Verilog
• System Verilog
• RTL
• Temporal Logic

Benefits

• Competitive salary
• Health insurance
• Strong learning and mentorship culture
• Exposure to cutting-edge chip design projects
• Clear long-term career growth in hardware engineering